Principal Eng

Employer - Microchip Technology India Private Limited
Job title - Principal Eng

Job Description
Job Description :
You will join the Test Development team to develop and deploy test concepts on real silicon. These tests are intended to catch manufacture defects in targeted IPs inside SoC. In this role you will have an opportunity to understand in depth SoC silicon architectures, Logic Verification at full chip level, DFT/Testability hooks in Silicon, methods and principles to deploy tests in ATE/Tester setup, cross-porting failures in full chip logic verification Vs bench Vs ATE.
You will work closely with Silicon design engineers, Verification engineers and software engineers, Yield enhancement engineers and test engineers to ensure Microsemi PRO division deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required.
Job duties include

Translating SoC architecture and block specification to Test objectives and methods to target manufacturing defects.
These tests are predominantly written in C firmware embedded in chip which respond to JTAG commands written on top of Java APIs.
Improving, extending and porting existing manufacturing test designs to all FPGA family members.
Analyze yield issues and profiling tests such that yield fallout is root caused.
Silicon debug using JTAG debuggers, LA, Scopes. Reproducing Silicon fails in Full Chip Simulation for quicker debug
Cross-functional team interfacing and collaboration in all activities
Key values, beliefs, and attitudes
Initiative (self-motivated, self-confident, self-driven, self-learning, always striving for excellence)
Commitment (responsible, responsive, commit to winning)
Solid functional and technical skills
Work quality ("do it right the first time", attention to detail, good documentation)
Job Requirements

Required Skills and Experience

BS or MS in EE and about 8-10 years of experience in Validation/Test development
Hands on experience in testing and debug of silicon (such as FPGA, ASIC, test chips, etc.)
Good programming skill: C, C++/Java with exceptionally good at low level C/assembly
Firmware Development: any uController or ARM are preferred
Understanding basics of silicon manufacturing issues and their design methods. MBIST, Scan Methods and related yield issues
Hands-on experience with Verilog and/or VHDL
Behavioral, RTL and Gate Level coding, Programming Language Interface
Exposure to ASIC/FPGA design flow and methodology is a plus
HDL, synthesis, static timing analysis, constraining, Place & Route
Hands on experience on Silicon Debug, exposure to JTAG based debuggers is a big plus
Comfortable with Unix, Fluent in Perl and/or Shell scripting, agile with Make, and familiar with Revision Control (CVS, SVN, …)
Strong analytical and problem solving skills
Excellent communication, documentation and presentation skills
Must have strong self-learning ability, leadership, and enjoy working in teams Preferred Skills

Working knowledge of JAVA programming
Exposure to Manufacturing Test Systems (such as Teradyne J750)
Experience with Boundary Scan (IEEE 1149.1)
(IEEE 1149.1 Standard, TAP Controller, applications)
Working knowledge of SOC and/or FPGA Architectures
8.00-12.00 Years

principal-eng, principal-eng-jobs-in-hyderabad
Job Location Hyderabad, Telangana
Date Posted 29 Sep 2020
Employer Email --No Email
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